The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.
In a System-on-Chip (SoC), caches within the SoC packaging are typically implemented as SRAM while caches and system memories external to the SoC packaging are typically implemented as DRAM or Flash. A program is usually transferred from a long-term storage (typically a non-volatile memory, such as Flash or Solid-State Drives) to the system memory for fast access. A central processing unit (CPU) fetches data or instructions associated with the program from the system memory in order to process them. To further speed up the processing time while these data or instructions are being processed, they are sometimes temporarily kept in one or more levels of caches for even quicker access by the CPU. Accordingly, if the CPU needs certain data, the CPU initially looks within the caches. In the event of a cache-miss, i.e., the data needed by the CPU does not exist within the cache, the CPU will move on to search within the system memory, followed by the long-term storage.
Many programs, applications, and processes are stored in the system memory when the CPU is not actively processing them. They remain idle in the system memory and take up expensive memory space. In addition, the system memory is usually implemented with volatile memory units, which require a constant supply of power to maintain the data stored therein. When the system memory includes a large DRAM, for example, the system also incurs significant power expenditure to maintain the data in the DRAM-based system memory.